Features ........................................................................................................................................................ 1
Ordering Information ..................................................................................................................................... 2
Part Number .................................................................................................................................................. 2
Pin Function ................................................................................................................................................ 13
Simplified State Diagram............................................................................................................................. 23
Revision History .......................................................................................................................................... 52
Preliminary Data Sheet E0248E10 (Ver. 1.0)
3
EDS2504APTA/08APTA/16APTA-TI
Electrical Specifications
•
All voltages are referenced to VSS (GND).
•
After power up, wait more than 100
µs
and then, execute Power on sequence and CBR (auto) Refresh before
proper device operation is achieved.
Absolute Maximum Ratings
Parameter
Voltage on any pin relative to VSS
Supply voltage relative to VSS
Short circuit output current
Power dissipation
Operating temperature
Storage temperature
Symbol
VT
VDD
IOS
PD
TA
Tstg
Rating
–0.5 to VDD + 0.5 (≤
4.6 (max.))
–0.5 to +4.6
50
1.0
–40 to +85
–55 to +125
Unit
V
V
mA
W
°C
°C
Note
Notes: 1. Respect to VSS.
Caution
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended Operating Conditions (TA = –40 to +85°C)
°
Parameter
Supply voltage
Symbol
VDD, VDDQ
VSS, VSSQ
Input high voltage
Input low voltage
VIH
VIL
min.
3.0
0
2.0
–0.3
max.
3.6
0
VDD + 0.3
0.8
Unit
V
V
V
V
Notes
1, 2
3
1, 4
1, 5
Notes: 1.
2.
3.
4.
5.
All voltage referred to VSS.
The supply voltage with all VDD and VDDQ pins must be on the same level.
The supply voltage with all VSS and VSSQ pins must be on the same level.
VIH (max.) = VDD + 2.0 V for pulse width
≤
3ns at VDD.
VIL (min.) = VSS – 2.0 V for pulse width
≤
3ns at VSS.
Preliminary Data Sheet E0248E10 (Ver. 1.0)
4
EDS2504APTA/08APTA/16APTA-TI
DC Characteristics 1 (TA = –40 to +85°C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V)
°
Parameter
/CAS latency
Operating current
Symbol
ICC1
ICC1
Standby current in power
down
Standby current in power
down (input signal stable)
Standby current in non
power down
Standby current in non
power down (input signal
stable)
Active standby current in
power down
Active standby current in
power down (input signal
stable)
Active standby current in
non power down
Active standby current in
non power down (input
signal stable)
Burst operating current
Refresh current
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
ICC5
ICC5
Self refresh current
ICC6
-7A
-75
Grade
-7A
-75
max.
×
4
130
110
3
2
20
9
4
3
30
15
130
250
220
3
×
8
130
110
3
2
20
9
4
3
30
15
135
250
220
3
×
16
135
115
3
2
20
9
4
3
30
15
145
250
220
3
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Test condition
Burst length = 1
tRC = min.
Burst length = 1
tRC = min.
CKE = VIL, tCK = min.
CKE = VIL, tCK =
∞
CKE, /CS = VIH,
tCK = min.
CKE = VIH, tCK =
∞,
/CS = VIH
CKE = VIL, tCK = min.
CKE = VIL, tCK =
∞
CKE, /CS = VIH,
tCK = min.
CKE = VIH, tCK =
∞,
/CS = VIH
tCK = min., BL = 4
tRC = min.
tRC = min.
VIH
≥
VDD
– 0.2V
VIL
≤
0.2V
Notes
1, 2, 3
6
7
4
8
1, 2, 6
2, 7
1, 2, 4
2, 8
1, 2, 5
3
Notes: 1. ICC depends on output load condition when the device is selected. ICC (max.) is specified at the output
open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CLK operating current.
7. After power down mode, no CLK operating current.
