IDT54/74FCT373T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL
TRANSPARENT LATCH
IDT54/74FCT373T/AT/CT
FEATURES:
−
−
−
−
−
−
−
−
−
Low input and output leakage
≤1µ
A (max.)
CMOS power levels
True TTL input and output compatibility
•
V
OH
= 3.3V (typ.)
•
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Std., A, and C speed grades
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Power off disable outputs permit “live insertion”
Available in the following packages:
•
Industrial: SOIC, SSOP, QSOP, TSSOP
•
Military: CERDIP, LCC, CERPACK
DESCRIPTION:
The FCT373Tis an octal transparent latch built using an advanced dual
metal CMOS technology. These octal latches have 3-state outputs and are
intended for bus oriented applications. The flip-flops appear transparent to
the data when Latch Enable (LE) is high. When LE is low, the data that meets
the set-up time is latched. Data appears on the bus when the Output Enable
(OE) is low. When
OE
is high, the bus output is in the high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
AUGUST 2000
DSC-5496/-
IDT54/74FCT373T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
PIN CONFIGURATION
OE
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
1
2
3
4
5
6
7
8
9
10
D20-1
SO20-2
SO20-7
SO20-8
SO20-9
E20-1
O
0
19
18
17
16
15
14
13
12
11
O
7
D
7
D
6
O
6
O
2
O
5
D
2
D
5
D
4
O
4
D
3
7
8
9
10
11
12
13
15
14
6
L20-2
16
3
2
1
20
19
18
17
D
1
O
1
D
0
O
7
20
V
CC
INDEX
V
CC
4
5
D
7
D
6
O
6
O
5
D
5
O
3
O
4
GND
LE
CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP/ CERPACK
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
Rating
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
8T-link
PIN DESCRIPTION
Pin Names
D
N
LE
OE
O
N
Description
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
FUNCTION TABLE
(1)
D
N
H
L
X
Inputs
LE
H
H
X
OE
L
L
H
Outputs
O
N
H
L
Z
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8T-link
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-Impedance
NOTE:
1. This parameter is measured at characterization but not tested.
2
LE
D
4
IDT54/74FCT373T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%; Military: T
A
=
–55°C to +125°C, V
CC
= 5.0V ± 10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State Output pins)
(4)
Input HIGH Current
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
—
V
CC
= Max., V
IN
=
GND or
V
CC
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
mA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
Test Conditions
(1)
V
CC
= Min.
I
OH
= –6mA MIL
V
IN
= V
IH
or V
IL
I
OH
= –8mA IND
I
OH
= –12mA MIL
I
OH
= –15mA IND
V
CC
= Min.
I
OL
= 32mA MIL
V
IN
= V
IH
or V
IL
I
OL
= 48mA IND
(3)
V
CC
= Max, V
O
= GND
V
CC
= 0V, V
IN
or V
O
≤
4.5V
Min.
2.4
2
—
–60
—
Typ.
(2)
3.3
3
0.3
–120
—
Max.
—
—
0.5
–225
±
1
V
mA
µA
Unit
V
V
OL
I
OS
I
OFF
Output LOW Voltage
Short Circuit Current
Input/Output Power Off Leakage
(5)
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= -55°C.
5. This parameter is guaraneteed but not tested.
3
IDT54/74FCT373T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
= GND
LE
=
V
CC
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
= GND
LE
=
V
CC
Eight Bits Toggling
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
1.5
3.5
mA
—
1.8
4.5
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
3
6
(5)
—
5
14
(5)
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i =
Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT373T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
FCT373T
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Parameter
Propagation Delay
D
N
to O
N
Propagation Delay
LE to O
N
Output Enable Time
Output Disable Time
Set-up Time HIGH
or LOW, D
N
to LE
Hold Time HIGH
or LOW, D
N
to LE
LE Pulse Width HIGH
(3)
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
6
Max.
8
13
12
7.5
—
—
—
FCT373AT
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
5
Max.
5.2
8.5
6.5
5.5
—
—
—
FCT373CT
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
5
Max.
4.2
5.5
5.5
5
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
FCT373T
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Parameter
Propagation Delay
D
N
to O
N
Propagation Delay
LE to O
N
Output Enable Time
Output Disable Time
Set-up Time HIGH
or LOW, D
N
to LE
Hold Time HIGH
or LOW, D
N
to LE
LE Pulse Width HIGH
(3)
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
6
Max.
8.5
15
13.5
10
—
—
—
FCT373AT
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
6
Max.
5.6
9.8
7.5
6.5
—
—
—
FCT373CT
Min
.
(2)
1.5
2
1.5
1.5
2
1.5
6
Max.
5.1
8
6.3
5.9
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
