STM32F479xx
ARM
®
Cortex
®
-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/384+4KB RAM, USB OTG HS/FS,
Ethernet, FMC, dual Quad-SPI, Crypto, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
Datasheet
-
production data
Features
•
Core: ARM
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions
•
Memories
–
–
–
Up to 2 MB of Flash memory organized into two
banks allowing read-while-write
Up to 384+4 KB of SRAM including 64-KB of
CCM (core coupled memory) data RAM
Flexible external memory controller with up to
32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR, SDRAM, Flash NOR/NAND
memories
Dual-flash mode Quad-SPI interface
LQFP176 (24 × 24 mm)
LQFP208 (28 x 28 mm)
UFBGA169 (7 × 7 mm)
UFBGA176 (10 x 10 mm)
TFBGA216 (13 x 13 mm)
WLCSP168
•
Debug mode
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SWD & JTAG interfaces
Cortex
®
-M4 Trace Macrocell™
Up to 157 fast I/Os up to 90 MHz
Up to 159 5 V-tolerant I/Os
•
Up to 161 I/O ports with interrupt capability
•
Up to 21 communication interfaces
–
–
–
–
–
–
–
–
–
–
–
•
Graphics:
Chrom-ART Accelerator™ (DMA2D), graphical
hardware accelerator enabling enhanced
graphical user interface with minimum CPU load
LCD parallel interface, 8080/6800 modes
LCD TFT controller supporting up to XGA
resolution
MIPI
®
DSI host controller supporting up to 720p
30Hz resolution
Up to 3 × I
2
C interfaces (SMBus/PMBus)
Up to 4 USARTs and 4 UARTs (11.25 Mbit/s,
ISO7816 interface, LIN, IrDA, modem control)
Up to 6 SPIs (45 Mbits/s), 2 with muxed full-
duplex I
2
S for audio class accuracy via internal
audio PLL or external clock
1 x SAI (serial audio interface)
2 × CAN (2.0B Active)
SDIO interface
USB 2.0 full-speed device/host/OTG controller
with on-chip PHY
USB 2.0 high-speed/full-speed device/host/OTG
controller with dedicated DMA, on-chip full-
speed PHY and ULPI
Dedicated USB power rail enabling on-chip
PHYs operation throughout the entire MCU
power supply range
10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
•
Advanced connectivity
•
Clock, reset and supply management
1.7 V to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
4-to-26 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC (1%
accuracy)
32 kHz oscillator for RTC with calibration
Internal 32 kHz RC with calibration
Sleep, Stop and Standby modes
V
BAT
supply for RTC, 20×32 bit backup registers
+ optional 4 KB backup SRAM
•
–
–
Low power
•
8- to 14-bit parallel camera interface up to
54 Mbytes/s
•
Cryptographic accelerator
–
Hardware accelerator for AES 128, 192 256,
Triple DES, HASH (MD5, SHA-1, SHA-2) and
HMAC
•
3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
•
2×12-bit D/A converters
•
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
•
Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 180 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input. 2x watchdogs and
SysTick timer
•
•
•
•
True random number generator
CRC calculation unit
RTC: subsecond accuracy, hardware calendar
96-bit unique ID
Table 1. Device summary
Reference
Part numbers
STM32F479AI, STM32F479AG, STM32F479BI,
STM32F479BG, STM32F479II, STM32F479IG
STM32F479NI, STM32F479NG
STM32F479xx
October 2015
This is information on a product in full production.
DocID028010 Rev 2
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Contents
STM32F479xx
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.1
Compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.1.1
1.1.2
1.1.3
1.1.4
LQFP176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
LQFP208 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
UFBGA176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
TFBGA216 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
ARM
®
Cortex
®
-M4 with FPU and embedded Flash and SRAM . . . . . . . 19
Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 19
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 20
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Flexible Memory Controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 23
LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DSI Host (DSIHOST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 25
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 25
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.19.1
2.19.2
Internal reset ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.20
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.20.1
2.20.2
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Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 32
2.21
2.22
2.23
2.24
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 33
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.24.1
2.24.2
2.24.3
2.24.4
2.24.5
2.24.6
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 35
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32
2.33
2.34
2.35
2.36
2.37
2.38
2.39
2.40
2.41
2.42
2.43
2.44
2.45
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Universal synchronous/asynchronous receiver transmitters (USART) . . 37
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Inter-integrated sound (I
2
S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Serial Audio interface (SAI1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Audio and LCD PLL(PLLSAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . . . 40
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 40
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 41
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 41
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Cryptographic accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
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4
5
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
5.2
5.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
5.3.17
5.3.18
5.3.19
5.3.20
5.3.21
5.3.22
5.3.23
5.3.24
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Operating conditions at power-up / power-down (regulator ON) . . . . . . 92
Operating conditions at power-up / power-down (regulator OFF) . . . . . 92
Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . 92
Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 110
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 114
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
PLL spread spectrum clock generation (SSCG) characteristics . . . . . 119
MIPI D-PHY characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
MIPI D-PHY PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
MIPI D-PHY regulator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 124
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 128
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
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5.3.26
5.3.27
5.3.28
5.3.29
5.3.30
5.3.31
5.3.32
5.3.33
5.3.34
Contents
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Quad-SPI interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 182
LCD-TFT controller (LTDC) characteristics . . . . . . . . . . . . . . . . . . . . . 183
SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 185
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
6.1
6.2
6.3
6.4
6.5
6.6
6.7
WLCSP168 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
UFBGA169 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
LQFP176 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
UFBGA176+25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
LQFP208 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
TFBGA216 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
7
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Appendix A Recommendations when using internal reset OFF . . . . . . . . . . . 206
A.1
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
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