STP12NM50 - STP12NM50FP
STB12NM50 - STB12NM50-1
N-channel 550V @ tjmax - 0.30Ω - 12A TO-220/FP/D
2
/I
2
PAK
MDmesh™ Power MOSFET
General features
Type
STB12NM50
STB12NM50-1
STP12NM50
STP12NM50FP
■
■
■
■
■
V
DSS
(@Tjmax)
550V
550V
550V
550V
R
DS(on)
<0.35Ω
<0.35Ω
<0.35Ω
<0.35Ω
I
D
12A
12A
12A
12A
3
1
3
1
2
3
1
2
TO-220
TO-220FP
High dv/dt and avalanche capabilities
Low input capacitance and gate charge
100% avalanche tested
Low gate input resistance
Tight process control and high manufacturing
yields
D²PAK
3
12
I²PAK
Internal schematic diagram
Description
The MDmesh™ is a new revolutionary MOSFET
technology that associates the Multiple Drain
process with the Company’s PowerMESH™
horizontal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The
adoption of the Company’s proprietary strip
technique yields overall dynamic performance
that is significantly better than that of similar
competition’s products.
Applications
■
Switching application
Order codes
Part number
STB12NM50T4
STB12NM50-1
STP12NM50
STP12NM50FP
Marking
B12NM50
B12NM50
P12NM50
P12NM50FP
Package
D²PAK
I²PAK
TO-220
TO-220FP
Packaging
Tape & reel
Tube
Tube
Tube
July 2006
Rev 11
1/17
www.st.com
17
Contents
STP12NM50-STP12NM50FP-STB12NM50-STB12NM50-1
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
4
5
6
Test circuit
................................................ 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
STP12NM50-STP12NM50FP-STB12NM50-STB12NM50-1
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Value
Parameter
TO-220-
/D²PAK/I²PAK
± 30
12
7.5
48
160
1.28
--
15
-65 to 150
12
(1)
7.5
(1)
48
(1)
35
0.28
2500
Unit
TO-220FP
V
A
A
A
W
W/°C
V
V/ns
°C
V
GS
I
D
I
D
I
DM(2)
P
TOT
Gate-source voltage
Drain current (continuous) at T
C
= 25°C
Drain current (continuous) at T
C
=100°C
Drain current (pulsed)
Total dissipation at T
C
= 25°C
Derating Factor
V
ISO
dv/dt
(3)
T
J
T
stg
Insulation winthstand voltage (DC)
Peak diode recovery voltage slope
Operating junction temperature
Storage temperature
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3.
I
SD
≤
12A, di/dt
≤
400A/µs, V
DD
=80%V
(BR)DSS
Table 2.
Thermal data
Value
Symbol
Parameter
TO-220/D²PAK/
I² PAK
Unit
TO-220FP
3.57
°C/W
°C/W
°C
R
thj-case
R
thj-a
T
l
Thermal resistance junction-case Max
Thermal resistance junction-ambient Max
Maximum lead temperature for soldering
purpose
0.78
62.5
300
Table 3.
Symbol
I
AS
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
Single pulse avalanche energy
(starting Tj=25°C, Id=Iar, Vdd=50V)
Value
6
400
Unit
A
mJ
3/17
Electrical characteristics
STP12NM50-STP12NM50FP-STB12NM50-STB12NM50-1
2
Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 4.
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
On/off states
Parameter
Drain-source breakdown
voltage
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage current
(V
DS
= 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
I
D
= 250 µA, V
GS
= 0
V
DS
= Max rating,
V
DS
= Max rating @125°C
V
GS
= ±30V
V
DS
= V
GS
, I
D
= 50µA
V
GS
= 10V, I
D
= 6A
3
4
0.30
Min.
500
1
10
±
100
Typ.
Max.
Unit
V
µA
µA
nA
V
Ω
5
0.35
Table 5.
Symbol
g
fs (1)
C
iss
C
oss
C
rss
Dynamic
Parameter
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Test conditions
V
DS
=15V, I
D
= 6A
Min.
Typ.
5.5
1000
250
20
90
20
10
28
8
18
1.6
39
Max.
Unit
S
pF
pF
pF
pF
ns
ns
nC
nC
nC
Ω
V
DS
=25V, f=1 MHz, V
GS
=0
Equivalent output
C
oss eq(2).
capacitance
t
d(on)
t
r
Q
g
Q
gs
Q
gd
R
g
Turn-on Delay Time
Rise Time
Total gate charge
Gate-source charge
Gate-drain charge
Gate input resistance
V
GS
=0, V
DS
=0V to 400V
V
DD
= 250V, I
D
= 6A,
R
G
= 4.7Ω, V
GS
= 10V
(see Figure 14)
V
DD
=400V, I
D
= 12A
V
GS
=10V
(see Figure 15)
f=1MHz Gate DC Bias=0
test signal level=20mV
open drain
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
inceases from 0 to 80% V
DSS
4/17
STP12NM50-STP12NM50FP-STB12NM50-STB12NM50-1
Electrical characteristics
Table 6.
Symbol
I
SD
I
SDM(1)
V
SD(2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Source drain diode
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
=12A, V
GS
=0
I
SD
=12A,
di/dt = 100A/µs,
V
DD
=100V, Tj=25°C
(see Figure 16)
I
SD
=12A,
di/dt = 100A/µs,
V
DD
=100V, Tj=150°C
(see Figure 16)
270
2.23
16.5
Test conditions
Min
Typ.
Max
11
48
1.5
Unit
A
A
V
ns
µC
A
Reverse recovery time
Reverse recovery charge
Reverse recovery current
340
3
18
ns
µC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
5/17
DSP 与 ARM 处理器
