2019年11月06日 | 三星S3C2440 ARM920T内核处理器寄存器整理--非常有用的资料

对于从事嵌入式和硬件开发的工程师来说以下资料非常有用，从内存、USB、DMA到中断非常全。

// Memory control  13

#define rBWSCON    (*(volatile unsigned *)0x48000000) //Bus width & wait status

#define rBANKCON0  (*(volatile unsigned *)0x48000004) //Boot ROM control

#define rBANKCON1  (*(volatile unsigned *)0x48000008) //BANK1 control

#define rBANKCON2  (*(volatile unsigned *)0x4800000c) //BANK2 cControl

#define rBANKCON3  (*(volatile unsigned *)0x48000010) //BANK3 control

#define rBANKCON4  (*(volatile unsigned *)0x48000014) //BANK4 control

#define rBANKCON5  (*(volatile unsigned *)0x48000018) //BANK5 control

#define rBANKCON6  (*(volatile unsigned *)0x4800001c) //BANK6 control

#define rBANKCON7  (*(volatile unsigned *)0x48000020) //BANK7 control

#define rREFRESH   (*(volatile unsigned *)0x48000024) //DRAM/SDRAM refresh

#define rBANKSIZE  (*(volatile unsigned *)0x48000028) //Flexible Bank Size

#define rMRSRB6    (*(volatile unsigned *)0x4800002c) //Mode register set for SDRAM

#define rMRSRB7    (*(volatile unsigned *)0x48000030) //Mode register set for SDRAM

// USB Host

// INTERRUPT   8

#define rSRCPND     (*(volatile unsigned *)0x4a000000) //Interrupt request status

#define rINTMOD     (*(volatile unsigned *)0x4a000004) //Interrupt mode control

#define rINTMSK     (*(volatile unsigned *)0x4a000008) //Interrupt mask control

#define rPRIORITY   (*(volatile unsigned *)0x4a00000a) //IRQ priority control

#define rINTPND     (*(volatile unsigned *)0x4a000010) //Interrupt request status

#define rINTOFFSET  (*(volatile unsigned *)0x4a000014) //Interruot request source offset

#define rSUBSRCPND  (*(volatile unsigned *)0x4a000018) //Sub source pending

#define rINTSUBMSK  (*(volatile unsigned *)0x4a00001c) //Interrupt sub mask

// DMA   36

#define rDISRC0     (*(volatile unsigned *)0x4b000000) //DMA 0 Initial source

#define rDISRCC0    (*(volatile unsigned *)0x4b000004) //DMA 0 Initial source control

#define rDIDST0     (*(volatile unsigned *)0x4b000008) //DMA 0 Initial Destination

#define rDIDSTC0    (*(volatile unsigned *)0x4b00000c) //DMA 0 Initial Destination control

#define rDCON0      (*(volatile unsigned *)0x4b000010) //DMA 0 Control

#define rDSTAT0     (*(volatile unsigned *)0x4b000014) //DMA 0 Status

#define rDCSRC0     (*(volatile unsigned *)0x4b000018) //DMA 0 Current source

#define rDCDST0     (*(volatile unsigned *)0x4b00001c) //DMA 0 Current destination

#define rDMASKTRIG0 (*(volatile unsigned *)0x4b000020) //DMA 0 Mask trigger

#define rDISRC1     (*(volatile unsigned *)0x4b000040) //DMA 1 Initial source

#define rDISRCC1    (*(volatile unsigned *)0x4b000044) //DMA 1 Initial source control

#define rDIDST1     (*(volatile unsigned *)0x4b000048) //DMA 1 Initial Destination

#define rDIDSTC1    (*(volatile unsigned *)0x4b00004c) //DMA 1 Initial Destination control

#define rDCON1      (*(volatile unsigned *)0x4b000050) //DMA 1 Control

#define rDSTAT1     (*(volatile unsigned *)0x4b000054) //DMA 1 Status

#define rDCSRC1     (*(volatile unsigned *)0x4b000058) //DMA 1 Current source

#define rDCDST1     (*(volatile unsigned *)0x4b00005c) //DMA 1 Current destination

#define rDMASKTRIG1 (*(volatile unsigned *)0x4b000060) //DMA 1 Mask trigger

#define rDISRC2     (*(volatile unsigned *)0x4b000080) //DMA 2 Initial source

#define rDISRCC2    (*(volatile unsigned *)0x4b000084) //DMA 2 Initial source control

#define rDIDST2     (*(volatile unsigned *)0x4b000088) //DMA 2 Initial Destination

#define rDIDSTC2    (*(volatile unsigned *)0x4b00008c) //DMA 2 Initial Destination control

#define rDCON2      (*(volatile unsigned *)0x4b000090) //DMA 2 Control

#define rDSTAT2     (*(volatile unsigned *)0x4b000094) //DMA 2 Status

#define rDCSRC2     (*(volatile unsigned *)0x4b000098) //DMA 2 Current source

#define rDCDST2     (*(volatile unsigned *)0x4b00009c) //DMA 2 Current destination

#define rDMASKTRIG2 (*(volatile unsigned *)0x4b0000a0) //DMA 2 Mask trigger

#define rDISRC3     (*(volatile unsigned *)0x4b0000c0) //DMA 3 Initial source

#define rDISRCC3    (*(volatile unsigned *)0x4b0000c4) //DMA 3 Initial source control

#define rDIDST3     (*(volatile unsigned *)0x4b0000c8) //DMA 3 Initial Destination

#define rDIDSTC3    (*(volatile unsigned *)0x4b0000cc) //DMA 3 Initial Destination control

#define rDCON3      (*(volatile unsigned *)0x4b0000d0) //DMA 3 Control

#define rDSTAT3     (*(volatile unsigned *)0x4b0000d4) //DMA 3 Status

#define rDCSRC3     (*(volatile unsigned *)0x4b0000d8) //DMA 3 Current source

#define rDCDST3     (*(volatile unsigned *)0x4b0000dc) //DMA 3 Current destination

#define rDMASKTRIG3 (*(volatile unsigned *)0x4b0000e0) //DMA 3 Mask trigger

// CLOCK & POWER MANAGEMENT  7

#define rLOCKTIME   (*(volatile unsigned *)0x4c000000) //PLL lock time counter

#define rMPLLCON    (*(volatile unsigned *)0x4c000004) //MPLL Control//系统主频配置寄存器基地址

#define rUPLLCON    (*(volatile unsigned *)0x4c000008) //UPLL Control//USB时钟频率配置寄存器基地址 

#define rCLKCON     (*(volatile unsigned *)0x4c00000c) //Clock generator control

#define rCLKSLOW    (*(volatile unsigned *)0x4c000010) //Slow clock control

#define rCLKDIVN    (*(volatile unsigned *)0x4c000014) //Clock divider control

#define rCAMDIVN    (*(volatile unsigned *)0x4c000018) //USB, CAM Clock divider control

// LCD CONTROLLER  18

#define rLCDCON1    (*(volatile unsigned *)0x4d000000) //LCD control 1

#define rLCDCON2    (*(volatile unsigned *)0x4d000004) //LCD control 2

#define rLCDCON3    (*(volatile unsigned *)0x4d000008) //LCD control 3

#define rLCDCON4    (*(volatile unsigned *)0x4d00000c) //LCD control 4

#define rLCDCON5    (*(volatile unsigned *)0x4d000010) //LCD control 5

#define rLCDSADDR1  (*(volatile unsigned *)0x4d000014) //STN/TFT Frame buffer start address 1

#define rLCDSADDR2  (*(volatile unsigned *)0x4d000018) //STN/TFT Frame buffer start address 2

#define rLCDSADDR3  (*(volatile unsigned *)0x4d00001c) //STN/TFT Virtual screen address set

#define rREDLUT     (*(volatile unsigned *)0x4d000020) //STN Red lookup table

#define rGREENLUT   (*(volatile unsigned *)0x4d000024) //STN Green lookup table 

#define rBLUELUT    (*(volatile unsigned *)0x4d000028) //STN Blue lookup table

#define rDITHMODE   (*(volatile unsigned *)0x4d00004c) //STN Dithering mode

#define rTPAL       (*(volatile unsigned *)0x4d000050) //TFT Temporary palette

#define rLCDINTPND  (*(volatile unsigned *)0x4d000054) //LCD Interrupt pending

#define rLCDSRCPND  (*(volatile unsigned *)0x4d000058) //LCD Interrupt source

#define rLCDINTMSK  (*(volatile unsigned *)0x4d00005c) //LCD Interrupt mask

#define rLPCSEL     (*(volatile unsigned *)0x4d000060) //LPC3600 Control

#define PALETTE     0x4d000400                         //Palette start address

//Nand Flash   17

#define rNFCONF  (*(volatile unsigned *)0x4E000000)  //NAND Flash configuration

#define rNFCONT  (*(volatile unsigned *)0x4E000004)      //NAND Flash control

#define rNFCMD  (*(volatile unsigned *)0x4E000008)      //NAND Flash command

#define rNFADDR  (*(volatile unsigned *)0x4E00000C)      //NAND Flash address

#define rNFDATA  (*(volatile unsigned *)0x4E000010)      //NAND Flash data

#define rNFDATA8 (*(volatile unsigned char *)0x4E000010)     //NAND Flash data

#define rNFMECCD0 (*(volatile unsigned *)0x4E000014)      //NAND Flash ECC for Main Area

#define rNFMECCD1 (*(volatile unsigned *)0x4E000018)

#define rNFSECCD (*(volatile unsigned *)0x4E00001C)  //NAND Flash ECC for Spare Area

#define rNFSTAT  (*(volatile unsigned *)0x4E000020)  //NAND Flash operation status

#define rNFESTAT0 (*(volatile unsigned *)0x4E000024)

#define rNFESTAT1 (*(volatile unsigned *)0x4E000028)

#define rNFMECC0 (*(volatile unsigned *)0x4E00002C)

#define rNFMECC1 (*(volatile unsigned *)0x4E000030)

#define rNFSECC  (*(volatile unsigned *)0x4E000034)

#define rNFSBLK  (*(volatile unsigned *)0x4E000038)  //NAND Flash Start block address

#define rNFEBLK  (*(volatile unsigned *)0x4E00003C)  //NAND Flash End block address

// UART    45

#define rULCON0     (*(volatile unsigned *)0x50000000) //UART 0 Line control

#define rUCON0      (*(volatile unsigned *)0x50000004) //UART 0 Control

#define rUFCON0     (*(volatile unsigned *)0x50000008) //UART 0 FIFO control

#define rUMCON0     (*(volatile unsigned *)0x5000000c) //UART 0 Modem control

#define rUTRSTAT0   (*(volatile unsigned *)0x50000010) //UART 0 Tx/Rx status

#define rUERSTAT0   (*(volatile unsigned *)0x50000014) //UART 0 Rx error status

#define rUFSTAT0    (*(volatile unsigned *)0x50000018) //UART 0 FIFO status

#define rUMSTAT0    (*(volatile unsigned *)0x5000001c) //UART 0 Modem status

#define rUBRDIV0    (*(volatile unsigned *)0x50000028) //UART 0 Baud rate divisor

#define rULCON1     (*(volatile unsigned *)0x50004000) //UART 1 Line control

#define rUCON1      (*(volatile unsigned *)0x50004004) //UART 1 Control

#define rUFCON1     (*(volatile unsigned *)0x50004008) //UART 1 FIFO control

#define rUMCON1     (*(volatile unsigned *)0x5000400c) //UART 1 Modem control

#define rUTRSTAT1   (*(volatile unsigned *)0x50004010) //UART 1 Tx/Rx status

#define rUERSTAT1   (*(volatile unsigned *)0x50004014) //UART 1 Rx error status

#define rUFSTAT1    (*(volatile unsigned *)0x50004018) //UART 1 FIFO status