MSP430F5529之UCS(Unified Clock System)上电默认配置
感觉也是似懂非懂,还请大神指点迷津。上电默认配置:XT1--LFmode,XT1CLK--ACLK(Disabled)DCOCLKDIV--MCLKDCOCLKDIV--SMCLKFLLreferenceclock--FLLCLK(Enable)XT2(Disable)XT1(Disable)上电后FLL时钟来源于XT1,但是XT1并未打开,所以需将XT1打开。当XT1工作稳定,FLL将MCLK和SMCLK稳定在1.048576MHz,和2.097152M