1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LQ16C
GD25LQ16C
DATASHEET
1
1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LQ16C
Contents
1
2
3
4
5
6
7
FEATURES
.........................................................................................................................................................4
GENERAL DESCRIPTION
................................................................................................................................5
MEMORY ORGANIZATION
...............................................................................................................................7
DEVICE OPERATION
........................................................................................................................................8
DATA PROTECTION
..........................................................................................................................................9
STATUS REGISTER.........................................................................................................................................
11
COMMANDS DESCRIPTION
.......................................................................................................................... 13
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
7.25
7.26
7.27
7.28
7.29
7.30
W
RITE
E
NABLE
(WREN) (06H) ................................................................................................................................ 16
W
RITE
D
ISABLE
(WRDI) (04H) ................................................................................................................................ 16
W
RITE
E
NABLE FOR
V
OLATILE
S
TATUS
R
EGISTER
(50H) ................................................................................................. 17
R
EAD
S
TATUS
R
EGISTER
(RDSR) (05H
OR
35H) .......................................................................................................... 17
W
RITE
S
TATUS
R
EGISTER
(WRSR) (01H) ................................................................................................................... 18
R
EAD
D
ATA
B
YTES
(READ) (03H) ............................................................................................................................ 19
R
EAD
D
ATA
B
YTES AT
H
IGHER
S
PEED
(F
AST
R
EAD
) (0BH) .............................................................................................. 19
D
UAL
O
UTPUT
F
AST
R
EAD
(3BH) .............................................................................................................................. 20
Q
UAD
O
UTPUT
F
AST
R
EAD
(6BH) ............................................................................................................................. 21
D
UAL
I/O F
AST
R
EAD
(BBH) .................................................................................................................................... 21
Q
UAD
I/O F
AST
R
EAD
(EBH) ................................................................................................................................... 23
S
ET
B
URST WITH
W
RAP
(77H) ................................................................................................................................. 24
P
AGE
P
ROGRAM
(PP) (02H) .................................................................................................................................... 25
Q
UAD
P
AGE
P
ROGRAM
(32H) .................................................................................................................................. 26
S
ECTOR
E
RASE
(SE) (20H) ....................................................................................................................................... 27
32KB B
LOCK
E
RASE
(BE) (52H) ............................................................................................................................... 27
64KB B
LOCK
E
RASE
(BE) (D8H)............................................................................................................................... 28
C
HIP
E
RASE
(CE) (60/C7H) ..................................................................................................................................... 28
E
NABLE
/D
ISABLE
SO
TO
O
UTPUT
RY/BY# (ESRY/DSRY) (70H/80H) ........................................................................... 29
D
EEP
P
OWER
-D
OWN
(DP) (B9H) ............................................................................................................................. 30
R
ELEASE FROM
D
EEP
P
OWER
-D
OWN AND
R
EAD
D
EVICE
ID (RDI) (ABH) ......................................................................... 31
R
EAD
M
ANUFACTURE
I
D
/ D
EVICE
I
D
(REMS) (90H) .................................................................................................... 32
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID D
UAL
I/O (92H) ................................................................................................. 33
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID Q
UAD
I/O (94H) ................................................................................................ 34
R
EAD
I
DENTIFICATION
(RDID) (9FH) ......................................................................................................................... 35
P
ROGRAM
/E
RASE
S
USPEND
(PES) (75H) ................................................................................................................... 36
P
ROGRAM
/E
RASE
R
ESUME
(PER) (7AH) ................................................................................................................... 36
R
EAD
U
NIQUE
ID (4BH) .......................................................................................................................................... 37
E
RASE
S
ECURITY
R
EGISTERS
(44H) ............................................................................................................................ 37
P
ROGRAM
S
ECURITY
R
EGISTERS
(42H) ....................................................................................................................... 38
2
1.8V Uniform Sector
Dual and Quad Serial Flash
7.31
7.32
7.33
8
GD25LQ16C
R
EAD
S
ECURITY
R
EGISTERS
(48H) ............................................................................................................................. 39
E
NABLE
R
ESET
(66H)
AND
R
ESET
(99H) ..................................................................................................................... 40
R
EAD
S
ERIAL
F
LASH
D
ISCOVERABLE
P
ARAMETER
(5AH)................................................................................................. 40
ELECTRICAL CHARACTERISTICS
.............................................................................................................. 45
8.1
8.2
8.3
8.4
8.5
8.6
POWER-ON TIMING ........................................................................................................................................... 45
I
NITIAL
D
ELIVERY
S
TATE
........................................................................................................................................... 45
A
BSOLUTE
M
AXIMUM
R
ATINGS
................................................................................................................................ 45
C
APACITANCE
M
EASUREMENT
C
ONDITIONS
................................................................................................................ 46
DC CHARACTERISTICS ........................................................................................................................................ 47
AC CHARACTERISTICS ......................................................................................................................................... 50
9
ORDERING INFORMATION
............................................................................................................................ 57
9.1
V
ALID
P
ART
N
UMBERS
............................................................................................................................................ 58
PACKAGE INFORMATION
......................................................................................................................... 60
P
ACKAGE
SOP8 150MIL ........................................................................................................................................ 60
P
ACKAGE
SOP8 208MIL ........................................................................................................................................ 61
P
ACKAGE
VSOP8 150MIL ...................................................................................................................................... 62
P
ACKAGE
VSOP8 208MIL ...................................................................................................................................... 63
P
ACKAGE
USON8 (3*3
MM
) ................................................................................................................................... 64
P
ACKAGE
USON8 (3*4
MM
) ................................................................................................................................... 65
P
ACKAGE
USON8 (4*4
MM
, 0.45
THICKNESS
) ............................................................................................................ 66
P
ACKAGE
WSON8 (6*5
MM
) .................................................................................................................................. 67
P
ACKAGE
LGA8 3*2
MM
......................................................................................................................................... 68
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10 P
ACKAGE
WLCSP .................................................................................................................................................. 69
11
REVISION HISTORY
.................................................................................................................................... 70
3
1.8V Uniform Sector
Dual and Quad Serial Flash
1 FEATURES
◆
GD25LQ16C
16M-bit Serial Flash
-2048K-byte
-256 bytes per programmable page
◆
Fast Program/Erase Speed
-Page Program time: 0.7ms typical
-Sector Erase time: 40ms typical
-Block Erase time: 0.15/0.18s typical
◆
Standard, Dual, Quad SPI
-Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
-Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#
-Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
◆
-Chip Erase time: 5s typical
Flexible Architecture
-Uniform Sector of 4K-byte
-Uniform Block of 32/64K-byte
◆
High Speed Clock Frequency
-104MHz for fast read with 30PF load
-Dual I/O Data transfer up to 208Mbits/s
-Quad I/O Data transfer up to 416Mbits/s
◆
-Erase/Program Suspend/Resume
Low Power Consumption
-9uA typical stand-by current
-1uA typical power down current
◆
Allows XIP(execute in place) Operation
-Continuous Read With 8/16/32/64-byte Wrap
◆
Advanced security Features
-128-bit Unique ID for each device
◆
Software/Hardware Write Protection
-Write protect all/portion of memory via software
-Enable/Disable protection with WP# Pin
-Top/Bottom Block protection
◆
-3x512-Byte Security Registers With OTP Lock
Single Power Supply Voltage
-Full voltage range: 1.65~2.1V
◆
◆
Minimum 100,000 Program/Erase Cycles
Data retention
-20-year data retention typical
4
1.8V Uniform Sector
Dual and Quad Serial Flash
2 GENERAL DESCRIPTION
GD25LQ16C
The GD25LQ16C (16M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the
Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#). The Dual I/O
data is transferred with speed of 208Mbits/s, the Quad I/O & Quad output data is transferred with speed of 416Mbits/s.
CONNECTION DIAGRAM
CS#
SO
(IO1)
WP#
(IO2)
VSS
1
2
Top View
3
4
8
7
6
5
VCC
HOLD#
(IO3)
SCLK
SI
(IO0)
CS#
SO
(IO1)
WP#
(IO2)
VSS
1
2
Top View
3
4
8
7
6
5
8–LEAD WSON/USON/LGA
VCC
HOLD#
(IO3)
SCLK
SI
(IO0)
8–LEAD VSOP/SOP
TOP VIEW
BOTTEOM VIEW
A1
VC C
A2
CS#
A2
CS#
A1
VCC
B1
HOLD#/
IO3
B2
SO/IO1
B2
SO/IO1
B1
HOLD#/
IO3
C1
SCLK
C2
WP#/
IO2
C2
WP#/
IO2
C1
SCLK
D1
SI/IO0
D2
VSS
D2
VSS
D1
SI/IO0
WLCSP
PIN DESCRIPTION
Pin Name
CS#
SO (IO1)
WP# (IO2)
VSS
SI (IO0)
SCLK
HOLD# (IO3)
VCC
Ball Name
A2
B2
C2
D2
D1
C1
B1
A1
I/O
I
I/O
I/O
I
I/O
I/O
Description
Chip Select Input
Data Output (Data Input Output 1)
Write Protect Input (Data Input Output 2)
Ground
Data Input (Data Input Output 0)
Serial Clock Input
Hold Input (Data Input Output 3)
Power Supply
Note: CS# must be driven high if chip is not selected. Please don’t leave CS# floating any time after power is on.
5
